1. Field of the Invention
The present invention relates to an operation voltage supply method for a semiconductor device.
2. Description of the Related Art
A conventional operation voltage supply apparatus for a semiconductor device will be described with referent to FIGS. 12 and 13. FIG. 12 schematically shows the circuit structure of the conventional operation voltage supply apparatus and the operation voltage supply method for a semiconductor device. FIG. 13 is a side view of a connection condition between a probe and a current source terminal of a semiconductor device to be tested.
A voltage development device 10 includes a variable voltage source 12 and a voltage compensation circuit 14. The variable voltage source 12 develops a voltage equal to the set voltage (Vs) set from outside as needed. The standard voltage is the chassis ground of the voltage development device 10.
The voltage compensation circuit 14 is composed of the first operational amplifier 30 and the second operational amplifier 40. A positive input terminal 32 of the first operational amplifier 30 is connected to a voltage input terminal 22 of the voltage compensation circuit 14. An output terminal 36 of the first operational amplifier 30 is connected to a voltage output terminal 24 of the voltage compensation circuit 14. A negative input terminal 34 of the first operational amplifier 30 is connected to an output terminal 46 of the second operational amplifier 40. A positive input terminal 42 of the second operational amplifier 40 is connected to a measurement voltage input terminal 26 of the voltage compensation circuit 14. The output terminal 46 of the second operational amplifier 40 is connected to a negative input terminal 44 of the second operational amplifier 40, foaming a voltage follower circuit. By connecting the voltage output terminal 24 of the voltage compensation circuit 14 and the measurement voltage input terminal 26 with a conductor 28, the first operational amplifier 30 also forms a voltage follower circuit through the conductor 28 and the second operational amplifier 40. Because the voltage compensation circuit 14 is formed as mentioned before, it operates such that the setting voltage (Vs) inputted to the input terminal 22 becomes equal to the measurement voltage (Vm) input to the measurement voltage inputted terminal 26. Thus, the output voltage (Vo) at the voltage output terminal 24 is the sum of the setting voltage (Vs) and the voltage difference ΔV between the setting voltage (Vs) and the measurement voltage (Vm); that is Vo=Vs+ΔV wherein ΔV=Vs−Vm. Inside connections of the voltage development device 10 are made by a printed circuit board or conductors as designed.
A probe card 51 includes a voltage-application probe 55. The voltage application probe 55 connects electrically a voltage application pad 75 of a semiconductor device 72 to be tested and the voltage output terminal 24 of the voltage development device 10 so that the voltage at the voltage output terminal 24 of the voltage development device 10 is applied to the voltage application pad 75 of the semiconductor device 72.
The voltage compensation circuit 14 assures that the output voltage (Vo) at the voltage output terminal 24 of the voltage development device 10 is equal to the setting voltage (Vs), however, to increase the accuracy of a voltage applied to the voltage application pad 75 of the semiconductor device 72, it is desired to input the measurement voltage near the voltage application pad 75 to the measurement voltage input terminal 26 of the voltage development device 10.
As a measurement probe of the semiconductor device, for measurement by using a tester, the probe for force and sense has been proposed to connect to a terminal installed at the semiconductor device (for example, Patent document 1: JP2000-206146).
The voltage application, however, is made by one probe as described with reference to FIGS. 12 and 13.
The conventional voltage application method has a disadvantage. For example, it is assumed that the semiconductor device 72 is the one for voltage measurement by using a probe. When a deposit 101 with a resistance component adheres to a tip of the voltage application probe 55, the contact resistance between the voltage application probe 55 and the voltage application pad 75 of the semiconductor device 72 increases. Even though the accurate voltage is outputted from the voltage output terminal 24 of the voltage development device, the resistance component of the deposit 101 produces a voltage drop, providing a voltage lower than the setting voltage at the semiconductor device 75. This deposit 101 is considered to be mainly oxidized aluminum that is chipped from the voltage application pad 75 of the semiconductor device 72 when the probe contacts the terminal.
With respect to FIG. 14, an example of test with the deposit 101 adhered will be described. If the setting voltage (Vs) is 3.0 V, a voltage of 3.0 V is applied to the tip of the voltage application probe 55. Now, if the current through the voltage application probe 55 is 100 mA and the contact resistance is 5Ω during the operation of the semiconductor device 72, only 2.5 V=3.0 V−5 Ω×100 mA is applied to the voltage application pad 75 due to the voltage drop.
If the margin of a voltage applied to the voltage application pad 75 is 10% and approximately 3V is applied to an LSI which operates on a low voltage, a good product can be determined to be defective because the applied voltage is lower than the setting voltage. To prevent this deficiency, the general practice is to polish the tip of a prob. However it decreases the productivity due to the time loss by removing and polishing of the probe card.
FIG. 15 shows the contact resistance versus the number of contact times by the probe. The horizontal axis represents the number of contacts with the terminal of a voltage source by the probe. The vertical axis represents the value of contact resistance. The curve I of FIG. 15 shows the contact resistance when the probe makes a number of contacts with the voltage source terminal under the condition of a current of 100 mA. The curve II of FIG. 15 shows the contact resistance when the probe contacts the voltage source terminal with no electric current. When the probe contacts the voltage source terminal with a current of 100 mA, the contact resistance increases with fewer contacts than the case where no current is conducted.
A probe on the market, whose contact resistance is increased by the deposit even with no electric current, is usable without polishing it because the contact resistance is only about 1Ω after the number of contacts with the voltage source terminal by the probe exceeds 3000 (Curve II in FIG. 15). On the other hand, when a current of 100 mA is conducted through the probe, the contact resistance exceeds 5Ω at only about 500 contacts (Curve I). When an operating current is 100 mA, the voltage drop by the contact resistance is 5 Ω×100 mA=0.5V.
If the applied voltage is greater than 5V, it is within 10% of the voltage margin, however, for example, if the applied voltage is about 3.3 V for a low voltage LSI, it will be out of 10% of the voltage margin.